I am a long-time electronics hobbyist and I accumulated quite a few different micro-controller boards over the years. I figured it would be nice to put them to some good use, but recently I find myself almost exclusively using the beefier kinds for the simplest of things, because everybody needs RTOS and WiFi to blink some LEDs, right? All of my simpler and less capable boards are just sitting there, collecting dust. Let's change that by... Blinking some LEDs. 🤷🏼

As these things tend to unfold, the project grew in scope a lot, and due to various complications I didn't actually make it on time for the holidays. I did get a blog post out of it, so my 2019 New Year's resolution of returning to blogging can now be marked as done!

After a lengthy break I'm back to the UPNOD series. This time we'll take a closer look at the dynamic random-access memory (DRAM) circuitry present on the PCB:

As usual, all of my findings can be found here.

A second installment in the UPNOD series, this time we'll take a look into the reset circuitry of the telco card.

As the title implies, this circuit is responsible for generating a proper Z80' reset sequence. Z80, being a rather dumb piece of clever electronics, may boot up in an undesirable undefined state and requires a few cycles of special treatment to properly initialize internal register values. This circuit does just that - it generates the initial reset pulse and handles reset signals coming from other parts of the board, all while maintaining proper synchronization.

Since my last actual post on this blog I have acquired a new class of hobbies - electronics. Most recently, reverse engineering of really old computers. This series of posts will be about a vintage eighties TelCo computer-card-thing marked UPNOD CARD0117 TN64 I bought on a local auction:

All my findings will be posted on this blog and the accompanying data will be gathered in this GitHub repository.